@@ -2176,7 +2176,7 @@ extern int const x86_64_ms_sysv_extra_clobbered_registers[12];
/* Before the prologue, RA is at 0(%esp). */
#define INCOMING_RETURN_ADDR_RTX \
- gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
+ gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM))
/* After the prologue, RA is at -4(AP) in the current frame. */
#define RETURN_ADDR_RTX(COUNT, FRAME) \
@@ -896,7 +896,7 @@ enum reg_class
RTL is either a `REG', indicating that the return value is saved in `REG',
or a `MEM' representing a location in the stack. This enables DWARF2
unwind info for C++ EH. */
-#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, BR_REG (0))
+#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, BR_REG (0))
/* A C expression whose value is an integer giving the offset, in bytes, from
the value of the stack pointer register to the top of the stack frame at the
@@ -258,7 +258,7 @@ enum reg_class
: (rtx) 0)
/* Before the prologue, RA lives in r31. */
-#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31)
+#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, GP_REG_FIRST + 31)
/* Register That Address the Stack Frame. */
@@ -768,7 +768,7 @@ do { if (cc_prev_status.flags & CC_IN_68881) \
/* Before the prologue, RA is at 0(%sp). */
#define INCOMING_RETURN_ADDR_RTX \
- gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
+ gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM))
/* After the prologue, RA is at 4(AP) in the current frame. */
#define RETURN_ADDR_RTX(COUNT, FRAME) \
@@ -182,7 +182,7 @@ extern enum pipeline_type microblaze_pipe;
NOTE: GDB has a workaround and expects this incorrect value.
If this is fixed, a corresponding fix to GDB is needed. */
#define INCOMING_RETURN_ADDR_RTX \
- gen_rtx_REG (VOIDmode, GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
+ gen_rtx_REG (Pmode, GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
/* Use DWARF 2 debugging information by default. */
#define DWARF2_DEBUGGING_INFO
@@ -1469,7 +1469,7 @@ FP_ASM_SPEC "\
#define DWARF_FRAME_RETURN_COLUMN RETURN_ADDR_REGNUM
/* Before the prologue, RA lives in r31. */
-#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, RETURN_ADDR_REGNUM)
+#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM)
/* Describe how we implement __builtin_eh_return. */
#define EH_RETURN_DATA_REGNO(N) \
@@ -516,7 +516,7 @@ struct cum_arg
/* The return address is saved both in the stack and in MDR. Using
the stack location is handiest for what unwinding needs. */
#define INCOMING_RETURN_ADDR_RTX \
- gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
+ gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM))
/* Maximum number of registers that can appear in a valid memory address. */
@@ -265,7 +265,7 @@ enum reg_class
#define FIRST_PARM_OFFSET(FUNDECL) 0
/* Before the prologue, RA lives in r31. */
-#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, RA_REGNO)
+#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RA_REGNO)
#define RETURN_ADDR_RTX(C,F) nios2_get_return_address (C)
#define DWARF_FRAME_RETURN_COLUMN RA_REGNO