diff mbox

[U-Boot,2/4] mmc: sunxi: Enable 8bits bus width for sun8i

Message ID 05bcf982c223a160cb5a95607c034000d2e5e62b.1478272627.git-series.maxime.ripard@free-electrons.com
State Accepted
Commit fb013184672003bac0b6d05b4a9f06a556821004
Delegated to: Jagannadha Sutradharudu Teki
Headers show

Commit Message

Maxime Ripard Nov. 4, 2016, 3:18 p.m. UTC 
The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
support for those too.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/mmc/sunxi_mmc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Chen-Yu Tsai Nov. 5, 2016, 1:34 a.m. UTC | #1 
On Fri, Nov 4, 2016 at 11:18 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
> support for those too.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
>  drivers/mmc/sunxi_mmc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> index 6953accce123..b8716c93cb06 100644
> --- a/drivers/mmc/sunxi_mmc.c
> +++ b/drivers/mmc/sunxi_mmc.c
> @@ -463,7 +463,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
>
>         cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
>         cfg->host_caps = MMC_MODE_4BIT;
> -#ifdef CONFIG_MACH_SUN50I
> +#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I)

8 come before 50. :)

Otherwise,

Reviewed-by: Chen-Yu Tsai <wens@csie.org>

>         if (sdc_no == 2)
>                 cfg->host_caps = MMC_MODE_8BIT;
>  #endif
> --
> git-series 0.8.11
Maxime Ripard Nov. 6, 2016, 5:15 p.m. UTC | #2 
On Sat, Nov 05, 2016 at 09:34:25AM +0800, Chen-Yu Tsai wrote:
> On Fri, Nov 4, 2016 at 11:18 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
> > support for those too.
> >
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  drivers/mmc/sunxi_mmc.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> > index 6953accce123..b8716c93cb06 100644
> > --- a/drivers/mmc/sunxi_mmc.c
> > +++ b/drivers/mmc/sunxi_mmc.c
> > @@ -463,7 +463,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
> >
> >         cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
> >         cfg->host_caps = MMC_MODE_4BIT;
> > -#ifdef CONFIG_MACH_SUN50I
> > +#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I)
> 
> 8 come before 50. :)

But 5 comes before 8, and 0 before i :)

> Otherwise,
> 
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>

Thanks,
Maxime
Chen-Yu Tsai Nov. 7, 2016, 1:53 a.m. UTC | #3 
On Mon, Nov 7, 2016 at 1:15 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Sat, Nov 05, 2016 at 09:34:25AM +0800, Chen-Yu Tsai wrote:
>> On Fri, Nov 4, 2016 at 11:18 PM, Maxime Ripard
>> <maxime.ripard@free-electrons.com> wrote:
>> > The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
>> > support for those too.
>> >
>> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> > ---
>> >  drivers/mmc/sunxi_mmc.c | 2 +-
>> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
>> > index 6953accce123..b8716c93cb06 100644
>> > --- a/drivers/mmc/sunxi_mmc.c
>> > +++ b/drivers/mmc/sunxi_mmc.c
>> > @@ -463,7 +463,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
>> >
>> >         cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
>> >         cfg->host_caps = MMC_MODE_4BIT;
>> > -#ifdef CONFIG_MACH_SUN50I
>> > +#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I)
>>
>> 8 come before 50. :)
>
> But 5 comes before 8, and 0 before i :)

Indeed, though 8 and 50 are akin to a generation number, so
it makes sense to sort them in natural order. :)

ChenYu

>
>> Otherwise,
>>
>> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
>
> Thanks,
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
Maxime Ripard Nov. 7, 2016, 8:39 a.m. UTC | #4 
1;4600;0c
On Mon, Nov 07, 2016 at 09:53:00AM +0800, Chen-Yu Tsai wrote:
> On Mon, Nov 7, 2016 at 1:15 AM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > On Sat, Nov 05, 2016 at 09:34:25AM +0800, Chen-Yu Tsai wrote:
> >> On Fri, Nov 4, 2016 at 11:18 PM, Maxime Ripard
> >> <maxime.ripard@free-electrons.com> wrote:
> >> > The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
> >> > support for those too.
> >> >
> >> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> >> > ---
> >> >  drivers/mmc/sunxi_mmc.c | 2 +-
> >> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >> >
> >> > diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> >> > index 6953accce123..b8716c93cb06 100644
> >> > --- a/drivers/mmc/sunxi_mmc.c
> >> > +++ b/drivers/mmc/sunxi_mmc.c
> >> > @@ -463,7 +463,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
> >> >
> >> >         cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
> >> >         cfg->host_caps = MMC_MODE_4BIT;
> >> > -#ifdef CONFIG_MACH_SUN50I
> >> > +#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I)
> >>
> >> 8 come before 50. :)
> >
> > But 5 comes before 8, and 0 before i :)
> 
> Indeed, though 8 and 50 are akin to a generation number, so
> it makes sense to sort them in natural order. :)

I know, but it was one of the comments I had in Linux, and we used
that ordering there. And we probably want to be consistent, but I
don't really care.

Maxime
Chen-Yu Tsai Nov. 7, 2016, 8:47 a.m. UTC | #5 
On Mon, Nov 7, 2016 at 4:39 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> 1;4600;0c
> On Mon, Nov 07, 2016 at 09:53:00AM +0800, Chen-Yu Tsai wrote:
>> On Mon, Nov 7, 2016 at 1:15 AM, Maxime Ripard
>> <maxime.ripard@free-electrons.com> wrote:
>> > On Sat, Nov 05, 2016 at 09:34:25AM +0800, Chen-Yu Tsai wrote:
>> >> On Fri, Nov 4, 2016 at 11:18 PM, Maxime Ripard
>> >> <maxime.ripard@free-electrons.com> wrote:
>> >> > The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
>> >> > support for those too.
>> >> >
>> >> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> >> > ---
>> >> >  drivers/mmc/sunxi_mmc.c | 2 +-
>> >> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >> >
>> >> > diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
>> >> > index 6953accce123..b8716c93cb06 100644
>> >> > --- a/drivers/mmc/sunxi_mmc.c
>> >> > +++ b/drivers/mmc/sunxi_mmc.c
>> >> > @@ -463,7 +463,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
>> >> >
>> >> >         cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
>> >> >         cfg->host_caps = MMC_MODE_4BIT;
>> >> > -#ifdef CONFIG_MACH_SUN50I
>> >> > +#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I)
>> >>
>> >> 8 come before 50. :)
>> >
>> > But 5 comes before 8, and 0 before i :)
>>
>> Indeed, though 8 and 50 are akin to a generation number, so
>> it makes sense to sort them in natural order. :)
>
> I know, but it was one of the comments I had in Linux, and we used
> that ordering there. And we probably want to be consistent, but I
> don't really care.

I see we have dictionary order in the ccu driver, natural order in
pinctrl/sunxi/Kconfig, and ordered by SoC name (Axx) in
pinctrl/sunxi/Makefile.

Anyway, no point in bikeshedding over this. Hans, please pick up
this patch as is with my Reviewed-by, unless you have other concerns. :)

ChenYu
Hans de Goede Nov. 13, 2016, 6:51 p.m. UTC | #6 
Hi,

On 04-11-16 16:18, Maxime Ripard wrote:
> The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
> support for those too.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

LGTM:

Reviewed-by: Hans de Goede <hdegoede@redhat.com>

Regards,

Hans


> ---
>  drivers/mmc/sunxi_mmc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> index 6953accce123..b8716c93cb06 100644
> --- a/drivers/mmc/sunxi_mmc.c
> +++ b/drivers/mmc/sunxi_mmc.c
> @@ -463,7 +463,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
>
>  	cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
>  	cfg->host_caps = MMC_MODE_4BIT;
> -#ifdef CONFIG_MACH_SUN50I
> +#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I)
>  	if (sdc_no == 2)
>  		cfg->host_caps = MMC_MODE_8BIT;
>  #endif
>
Jaehoon Chung Nov. 14, 2016, 12:04 p.m. UTC | #7 
On 11/14/2016 03:51 AM, Hans de Goede wrote:
> Hi,
> 
> On 04-11-16 16:18, Maxime Ripard wrote:
>> The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
>> support for those too.
>>
>> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> 
> LGTM:
> 
> Reviewed-by: Hans de Goede <hdegoede@redhat.com>

Applied on u-boot-mmc. Thanks!

Best Regards,
Jaehoon Chung

> 
> Regards,
> 
> Hans
> 
> 
>> ---
>>  drivers/mmc/sunxi_mmc.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
>> index 6953accce123..b8716c93cb06 100644
>> --- a/drivers/mmc/sunxi_mmc.c
>> +++ b/drivers/mmc/sunxi_mmc.c
>> @@ -463,7 +463,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
>>
>>      cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
>>      cfg->host_caps = MMC_MODE_4BIT;
>> -#ifdef CONFIG_MACH_SUN50I
>> +#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I)
>>      if (sdc_no == 2)
>>          cfg->host_caps = MMC_MODE_8BIT;
>>  #endif
>>
> 
> 
>
diff mbox

Patch

diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 6953accce123..b8716c93cb06 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -463,7 +463,7 @@  struct mmc *sunxi_mmc_init(int sdc_no)
 
 	cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
 	cfg->host_caps = MMC_MODE_4BIT;
-#ifdef CONFIG_MACH_SUN50I
+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I)
 	if (sdc_no == 2)
 		cfg->host_caps = MMC_MODE_8BIT;
 #endif