diff mbox

[07/29] target-sparc: implement UA2005 scratchpad registers

Message ID 1475316333-9776-8-git-send-email-atar4qemu@gmail.com
State New
Headers show

Commit Message

Artyom Tarasenko Oct. 1, 2016, 10:05 a.m. UTC 
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
---
 target-sparc/asi.h         |  1 +
 target-sparc/cpu.h         |  1 +
 target-sparc/ldst_helper.c | 28 ++++++++++++++++++++++++++++
 3 files changed, 30 insertions(+)

Comments

Richard Henderson Oct. 10, 2016, 9:37 p.m. UTC | #1 
On 10/01/2016 05:05 AM, Artyom Tarasenko wrote:
> +    case ASI_SCRATCHPAD: /* UA2005 privileged scratchpad */
> +        if (unlikely((addr >= 0x20) && (addr < 0x30))) {
> +            /* Hyperprivileged access only */
> +            cpu_unassigned_access(cs, addr, false, false, 1, size);
> +        }
> +        /* fall through */
> +    case ASI_HYP_SCRATCHPAD: /* UA2005 hyperprivileged scratchpad */
> +        {
> +            unsigned int i = (addr >> 3) & 0x7;
> +            ret = env->scratch[i];
> +            break;
> +        }

It *might* speed things up a teeny bit to implement ASI_HYP_SCRATCHPAD inline. 
E.g.

   case GET_ASI_HYP_SCRATCH:
     {
       TCGv_ptr tmp = tcg_temp_new_ptr();
#if UINTPTR_MAX == UINT32_MAX
       tcg_gen_extrl_i64_i32(tmp, addr);
       tcg_gen_andi_i32(tmp, tmp, 7 << 3);
#else
       tcg_gen_andi_i64(tmp, addr, 7 << 3);
#endif
       tcg_gen_add_ptr(tmp, tmp, cpu_env);
       tcg_gen_ld_i64(dst, tmp, offsetof(CPUSPARCState, scratch));
       tcg_temp_free_ptr(tmp);
     }
     break;

Of course, you can't do that for ASI_SCRATCHPAD because of the dynamic check 
against ADDR.

> @@ -2056,6 +2068,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
>          return;
>      case ASI_INTR_RECEIVE: /* Interrupt data receive */
>          env->ivec_status = val & 0x20;
> +        if (!env->ivec_status) {
> +            cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
> +        }
>          return;

This belongs in some other patch.


r~
diff mbox

Patch

diff --git a/target-sparc/asi.h b/target-sparc/asi.h
index c9a1849..d8d6284 100644
--- a/target-sparc/asi.h
+++ b/target-sparc/asi.h
@@ -211,6 +211,7 @@ 
 #define ASI_AFSR		0x4c /* Async fault status register	*/
 #define ASI_AFAR		0x4d /* Async fault address register	*/
 #define ASI_EC_TAG_DATA		0x4e /* E-cache tag/valid ram diag acc	*/
+#define ASI_HYP_SCRATCHPAD	0x4f /* (4V) Hypervisor scratchpad	*/
 #define ASI_IMMU		0x50 /* Insn-MMU main register space	*/
 #define ASI_IMMU_TSB_8KB_PTR	0x51 /* Insn-MMU 8KB TSB pointer reg	*/
 #define ASI_IMMU_TSB_64KB_PTR	0x52 /* Insn-MMU 64KB TSB pointer reg	*/
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index ff2e053..0b5c79f 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -512,6 +512,7 @@  struct CPUSPARCState {
     uint32_t gl; // UA2005
     /* UA 2005 hyperprivileged registers */
     uint64_t hpstate, htstate[MAXTL_MAX], hintp, htba, hver, hstick_cmpr, ssr;
+    uint64_t scratch[8];
     CPUTimer *hstick; // UA 2005
     /* Interrupt vector registers */
     uint64_t ivec_status;
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 7607128..5fb9024 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -1610,6 +1610,18 @@  uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
             }
             break;
         }
+    case ASI_SCRATCHPAD: /* UA2005 privileged scratchpad */
+        if (unlikely((addr >= 0x20) && (addr < 0x30))) {
+            /* Hyperprivileged access only */
+            cpu_unassigned_access(cs, addr, false, false, 1, size);
+        }
+        /* fall through */
+    case ASI_HYP_SCRATCHPAD: /* UA2005 hyperprivileged scratchpad */
+        {
+            unsigned int i = (addr >> 3) & 0x7;
+            ret = env->scratch[i];
+            break;
+        }
     case ASI_DCACHE_DATA:     /* D-cache data */
     case ASI_DCACHE_TAG:      /* D-cache tag access */
     case ASI_ESTATE_ERROR_EN: /* E-cache error enable */
@@ -2056,6 +2068,9 @@  void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
         return;
     case ASI_INTR_RECEIVE: /* Interrupt data receive */
         env->ivec_status = val & 0x20;
+        if (!env->ivec_status) {
+            cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
+        }
         return;
     case ASI_NUCLEUS_QUAD_LDD:   /* Nucleus quad LDD 128 bit atomic */
     case ASI_NUCLEUS_QUAD_LDD_L: /* Nucleus quad LDD 128 bit atomic LE */
@@ -2075,6 +2090,19 @@  void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
         /* Only stda allowed */
         helper_raise_exception(env, TT_ILL_INSN);
         return;
+    case ASI_SCRATCHPAD: /* UA2005 privileged scratchpad */
+        if (unlikely((addr >= 0x20) && (addr < 0x30))) {
+            /* Hyperprivileged access only */
+            cpu_unassigned_access(cs, addr, true, false, 1, size);
+        }
+        /* fall through */
+    case ASI_HYP_SCRATCHPAD: /* UA2005 hyperprivileged scratchpad */
+        {
+            unsigned int i = (addr >> 3) & 0x7;
+            env->scratch[i] = val;
+            return;
+        }
+
     case ASI_DCACHE_DATA: /* D-cache data */
     case ASI_DCACHE_TAG: /* D-cache tag access */
     case ASI_ESTATE_ERROR_EN: /* E-cache error enable */