Message ID | alpine.DEB.2.00.1609260614440.29007@tp.orcam.me.uk |
---|---|
State | Accepted |
Headers | show |
Maciej Rozycki <Maciej.Rozycki@imgtec.com> writes: > Revert a part of the `d' constraint documentation update made with > commit 111868 ("Use define_constraint for MIPS"), > <https://gcc.gnu.org/ml/gcc-patches/2006-03/msg00460.html>, > <https://gcc.gnu.org/ml/gcc-patches/2006-03/msg00541.html>, which > inadvertently made the registers covered to be referred to as "address" > rather than "general-purpose" registers, and then further clarify the > set of registers allowed with MIPS16 code. > > gcc/ > * config/mips/constraints.md (d): Fix documentation. > * doc/md.texi (Machine Constraints): Update accordingly. > > OK to apply? OK, thanks for the patch. Matthew
On Mon, 26 Sep 2016, Matthew Fortune wrote: > > * config/mips/constraints.md (d): Fix documentation. > > * doc/md.texi (Machine Constraints): Update accordingly. > > > > OK to apply? > > OK, thanks for the patch. Committed, thanks. Maciej
Index: gcc/gcc/config/mips/constraints.md =================================================================== --- gcc.orig/gcc/config/mips/constraints.md 2016-08-11 20:02:03.000000000 +0100 +++ gcc/gcc/config/mips/constraints.md 2016-09-26 07:59:05.542592370 +0100 @@ -20,8 +20,8 @@ ;; Register constraints (define_register_constraint "d" "TARGET_MIPS16 ? M16_REGS : GR_REGS" - "An address register. This is equivalent to @code{r} unless - generating MIPS16 code.") + "A general-purpose register. This is equivalent to @code{r} unless + generating MIPS16 code, in which case the MIPS16 register set is used.") (define_register_constraint "t" "T_REG" "@internal") Index: gcc/gcc/doc/md.texi =================================================================== --- gcc.orig/gcc/doc/md.texi 2016-08-11 20:02:07.000000000 +0100 +++ gcc/gcc/doc/md.texi 2016-09-26 07:59:13.283067222 +0100 @@ -2582,8 +2582,8 @@ A status register (@code{rmsr}, @code{$f @item MIPS---@file{config/mips/constraints.md} @table @code @item d -An address register. This is equivalent to @code{r} unless -generating MIPS16 code. +A general-purpose register. This is equivalent to @code{r} unless +generating MIPS16 code, in which case the MIPS16 register set is used. @item f A floating-point register (if available).