| Message ID | 1473670948-4265-4-git-send-email-shawnguo@kernel.org |
|---|---|
| State | New |
| Headers | show |
On Monday, September 12, 2016 5:02:27 PM CEST Shawn Guo wrote: > i.MX arm64 device tree changes for 4.9: > - Add property dma-coherent for ls2080a PCI device to save software > cache maintenance. > - Update serial aliases and use stdout-path to sepecify console for > ls2080a and ls1043a boards. > - Add DDR memory controller device node for ls2080a and ls1043a SoCs. > Pulled into next/dt64, thanks! The "dma-coherent" change sounds like a bugfix, should that be backported to stable kernels? Usually if you lack that property on a device that is actually coherent, you can get silent data corruption by treating it as non-coherent. Arnd
On Wed, Sep 14, 2016 at 05:30:49PM +0200, Arnd Bergmann wrote: > On Monday, September 12, 2016 5:02:27 PM CEST Shawn Guo wrote: > > i.MX arm64 device tree changes for 4.9: > > - Add property dma-coherent for ls2080a PCI device to save software > > cache maintenance. > > - Update serial aliases and use stdout-path to sepecify console for > > ls2080a and ls1043a boards. > > - Add DDR memory controller device node for ls2080a and ls1043a SoCs. > > > > Pulled into next/dt64, thanks! > > The "dma-coherent" change sounds like a bugfix, should that be backported > to stable kernels? Usually if you lack that property on a device that > is actually coherent, you can get silent data corruption by treating it as > non-coherent. My impression is that those cache maintenance enforced for non-coherent device will hurt performance on coherent device. I don't know it will cause data corruption. @Liu Gang, Did you experience any functional issue with PCI device before adding "dma-coherent" property? If not, can you please do more testing to confirm this is only about performance? Otherwise, you should follow Arnd's suggestion to send the change for stable kernel. Shawn
On Friday, September 16, 2016 9:47:03 AM CEST Shawn Guo wrote: > On Wed, Sep 14, 2016 at 05:30:49PM +0200, Arnd Bergmann wrote: > > On Monday, September 12, 2016 5:02:27 PM CEST Shawn Guo wrote: > > > i.MX arm64 device tree changes for 4.9: > > > - Add property dma-coherent for ls2080a PCI device to save software > > > cache maintenance. > > > - Update serial aliases and use stdout-path to sepecify console for > > > ls2080a and ls1043a boards. > > > - Add DDR memory controller device node for ls2080a and ls1043a SoCs. > > > > > > > Pulled into next/dt64, thanks! > > > > The "dma-coherent" change sounds like a bugfix, should that be backported > > to stable kernels? Usually if you lack that property on a device that > > is actually coherent, you can get silent data corruption by treating it as > > non-coherent. > > My impression is that those cache maintenance enforced for non-coherent > device will hurt performance on coherent device. I don't know it will > cause data corruption. The problem is that the device in this case is accessing data from the cache, while the CPU bypasses the cache for coherent mappings. The cache might have a stale cache line as the device reads data, or it could be in a writeback configuration, where the data written from the device to the cache has not made it into RAM at the time it is accessed by the CPU. For streaming mappings, the CPU will invalidate cache lines before reading the data, so again if the device has written data into the cache but not yet into memory, we will see stale data after dma_unmap_single(). Arnd
> -----Original Message----- > From: Arnd Bergmann <arnd@arndb.de> > Date: Fri, Sep 16, 2016 at 8:42 AM > Subject: Re: [GIT PULL 4/5] Freescale arm64 device tree updates for 4.9 > To: Shawn Guo <shawnguo@kernel.org> > Cc: Shawn Guo <shawnguo@kernel.org>, arm@kernel.org, > kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org > > > On Friday, September 16, 2016 9:47:03 AM CEST Shawn Guo wrote: > > On Wed, Sep 14, 2016 at 05:30:49PM +0200, Arnd Bergmann wrote: > > > On Monday, September 12, 2016 5:02:27 PM CEST Shawn Guo wrote: > > > > i.MX arm64 device tree changes for 4.9: > > > > - Add property dma-coherent for ls2080a PCI device to save software > > > > cache maintenance. > > > > - Update serial aliases and use stdout-path to sepecify console for > > > > ls2080a and ls1043a boards. > > > > - Add DDR memory controller device node for ls2080a and ls1043a SoCs. > > > > > > > > > > Pulled into next/dt64, thanks! > > > > > > The "dma-coherent" change sounds like a bugfix, should that be backported > > > to stable kernels? Usually if you lack that property on a device that > > > is actually coherent, you can get silent data corruption by treating it as > > > non-coherent. > > > > My impression is that those cache maintenance enforced for non-coherent > > device will hurt performance on coherent device. I don't know it will > > cause data corruption. > > The problem is that the device in this case is accessing data from > the cache, while the CPU bypasses the cache for coherent mappings. > The cache might have a stale cache line as the device reads data, or > it could be in a writeback configuration, where the data written > from the device to the cache has not made it into RAM at the time it > is accessed by the CPU. > > For streaming mappings, the CPU will invalidate cache lines > before reading the data, so again if the device has written data > into the cache but not yet into memory, we will see stale data > after dma_unmap_single(). I'm not following the potential data corruption issue. In this case at least, DMA cohrerent devices are not directly reading or writing any L1/L2 cache. If the device is writing a physical address, the write goes to memory, and snoops invalidate any corresponding cache lines in L1/L2 caches. If the device is reading a physical address, snoop transactions ensure that dirty L1/L2 cache lines are written to memory and the device gets the right data. The device is already sending the needed snoop transactions. The problem is that because of the missing dma-coherent property the kernel doesn't know it and unnecessarily does invalidates/flushes. Thanks, Stuart
The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc: Linux 4.8-rc1 (2016-08-07 18:18:00 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git tags/imx-dt64-4.9 for you to fetch changes up to e5f51a623a5d6dd24779e5136cf923611b032453: arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes (2016-09-09 14:04:21 +0800) ---------------------------------------------------------------- i.MX arm64 device tree changes for 4.9: - Add property dma-coherent for ls2080a PCI device to save software cache maintenance. - Update serial aliases and use stdout-path to sepecify console for ls2080a and ls1043a boards. - Add DDR memory controller device node for ls2080a and ls1043a SoCs. ---------------------------------------------------------------- Liu Gang (1): arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes Stuart Yoder (2): arm64: dts: updates serial aliases for ls1043a rdb and qds boards arm64: dts: add stdout-path to chosen node for ls2080a/ls1043a boards York Sun (1): arm64: dts: Add DDR memory controller for Layerscape SoCs arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 14 ++++++++------ arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 8 ++++++++ arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 7 +++++++ arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 3 +++ arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 4 ++++ arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 18 ++++++++++++++++++ 6 files changed, 48 insertions(+), 6 deletions(-)