Message ID | 575AC743.5010800@arm.com |
---|---|
State | New |
Headers | show |
On Fri, Jun 10, 2016 at 02:57:23PM +0100, Andre Vieira (lists) wrote: > Hello, > > This patch adds aarch64*-*-* to the list of supported targets for the > recently added zero bits compound tests. > Tested for aarch64-none-elf and aarch64_be-none-elf. > > Is this OK? This is OK, thanks. The tests already check for lp64, so I see no reason not to enable them. Thanks, James > gcc/testsuite/ChangeLog > 2016-06-10 Andre Vieira <andre.simoesdiasvieira@arm.com> > > * gcc.dg/zero_bits_compound-1.c: Support aarch64. > * gcc.dg/zero_bits_compound-1.c: Likewise.
diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c index d78dc43d0a4d9c22b9c19a8435ca0f976b9819b6..650da60c0c33f912fd94fa330551a809d1d0fe67 100644 --- a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c +++ b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c @@ -4,7 +4,7 @@ /* Note: This test requires that char, int and long have different sizes and the target has a way to do 32 -> 64 bit zero extension other than AND. */ -/* { dg-do compile { target x86_64-*-* s390*-*-* } } */ +/* { dg-do compile { target x86_64-*-* s390*-*-* aarch64*-*-* } } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-O3 -dP" } */ diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-2.c b/gcc/testsuite/gcc.dg/zero_bits_compound-2.c index 80fd363d9552e221d48801d2f29717ca5f3a42d4..f282b94d77915fd1717f3a51dc35c12682453f85 100644 --- a/gcc/testsuite/gcc.dg/zero_bits_compound-2.c +++ b/gcc/testsuite/gcc.dg/zero_bits_compound-2.c @@ -1,7 +1,7 @@ /* Test whether an AND mask or'ed with the know zero bits that equals a mode mask is a candidate for zero extendion. */ -/* { dg-do compile { target x86_64-*-* s390*-*-* } } */ +/* { dg-do compile { target x86_64-*-* s390*-*-* aarch64*-*-* } } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-O3 -dP" } */