Message ID | 1459522179-6584-1-git-send-email-james.hogan@imgtec.com |
---|---|
State | New |
Headers | show |
On 04/01/2016 07:49 AM, James Hogan wrote: > The MIPS TCG backend is the only one to have > tcg_target_reg_alloc_order[] elements of type TCGReg rather than int. > This resulted in commit 91478cefaaf2 ("tcg: Allocate indirect_base > temporaries in a different order") breaking the build on MIPS since the > type differed from indirect_reg_alloc_order[]: > > tcg/tcg.c:1725:44: error: pointer type mismatch in conditional expression [-Werror] > order = rev ? indirect_reg_alloc_order : tcg_target_reg_alloc_order; > ^ > > Make it an array of ints to fix the build and match other architectures. > > Fixes: 91478cefaaf2 ("tcg: Allocate indirect_base temporaries in a different order") > Signed-off-by: James Hogan<james.hogan@imgtec.com> > Cc: Aurelien Jarno<aurelien@aurel32.net> > Cc: Richard Henderson<rth@twiddle.net> > --- > tcg/mips/tcg-target.inc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson <rth@twiddle.net> Sorry, I've had the same fix queued for some time, but have failed to include it in a tcg pull. I'll rectify that soon. r~
On 2016-04-01 15:49, James Hogan wrote: > The MIPS TCG backend is the only one to have > tcg_target_reg_alloc_order[] elements of type TCGReg rather than int. > This resulted in commit 91478cefaaf2 ("tcg: Allocate indirect_base > temporaries in a different order") breaking the build on MIPS since the > type differed from indirect_reg_alloc_order[]: > > tcg/tcg.c:1725:44: error: pointer type mismatch in conditional expression [-Werror] > order = rev ? indirect_reg_alloc_order : tcg_target_reg_alloc_order; > ^ > > Make it an array of ints to fix the build and match other architectures. > > Fixes: 91478cefaaf2 ("tcg: Allocate indirect_base temporaries in a different order") > Signed-off-by: James Hogan <james.hogan@imgtec.com> > Cc: Aurelien Jarno <aurelien@aurel32.net> > Cc: Richard Henderson <rth@twiddle.net> > --- > tcg/mips/tcg-target.inc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c > index 297bd00910b7..682e19897db0 100644 > --- a/tcg/mips/tcg-target.inc.c > +++ b/tcg/mips/tcg-target.inc.c > @@ -76,7 +76,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { > #define TCG_TMP1 TCG_REG_T9 > > /* check if we really need so many registers :P */ > -static const TCGReg tcg_target_reg_alloc_order[] = { > +static const int tcg_target_reg_alloc_order[] = { > /* Call saved registers. */ > TCG_REG_S0, > TCG_REG_S1, Acked-by: Aurelien Jarno <aurelien@aurel32.net> Richard, do you have a pending TCG pull request in which you can include this one? Aurelien
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 297bd00910b7..682e19897db0 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -76,7 +76,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { #define TCG_TMP1 TCG_REG_T9 /* check if we really need so many registers :P */ -static const TCGReg tcg_target_reg_alloc_order[] = { +static const int tcg_target_reg_alloc_order[] = { /* Call saved registers. */ TCG_REG_S0, TCG_REG_S1,
The MIPS TCG backend is the only one to have tcg_target_reg_alloc_order[] elements of type TCGReg rather than int. This resulted in commit 91478cefaaf2 ("tcg: Allocate indirect_base temporaries in a different order") breaking the build on MIPS since the type differed from indirect_reg_alloc_order[]: tcg/tcg.c:1725:44: error: pointer type mismatch in conditional expression [-Werror] order = rev ? indirect_reg_alloc_order : tcg_target_reg_alloc_order; ^ Make it an array of ints to fix the build and match other architectures. Fixes: 91478cefaaf2 ("tcg: Allocate indirect_base temporaries in a different order") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Richard Henderson <rth@twiddle.net> --- tcg/mips/tcg-target.inc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)