| Message ID | 1448561293-16431-3-git-send-email-mw@semihalf.com |
|---|---|
| State | Superseded, archived |
| Delegated to: | David Miller |
| Headers | show |
Dear Marcin Wojtas, On Thu, 26 Nov 2015 19:08:09 +0100, Marcin Wojtas wrote: > MVNETA_RXQ_HW_BUF_ALLOC bit which controls enabling hardware buffer > allocation was mistakenly set as BIT(1). This commit fixes the assignment. > > Signed-off-by: Marcin Wojtas <mw@semihalf.com> > Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> > Cc: <stable@vger.kernel.org> # v3.8+ > Fixes: c5aff18204da ("net: mvneta: driver for Marvell Armada 370/XP network > unit") > --- > drivers/net/ethernet/marvell/mvneta.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) What is the user-visible impact of this bug? Indeed, the code is wrong, but things were working fine until now. So I am not questioning that this patch should be merged, but only questioning whether the stable tag is appropriate. Same questions for your patch 3/6. Thomas
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c index c4327b9..d78edbb 100644 --- a/drivers/net/ethernet/marvell/mvneta.c +++ b/drivers/net/ethernet/marvell/mvneta.c @@ -36,7 +36,7 @@ /* Registers */ #define MVNETA_RXQ_CONFIG_REG(q) (0x1400 + ((q) << 2)) -#define MVNETA_RXQ_HW_BUF_ALLOC BIT(1) +#define MVNETA_RXQ_HW_BUF_ALLOC BIT(0) #define MVNETA_RXQ_PKT_OFFSET_ALL_MASK (0xf << 8) #define MVNETA_RXQ_PKT_OFFSET_MASK(offs) ((offs) << 8) #define MVNETA_RXQ_THRESHOLD_REG(q) (0x14c0 + ((q) << 2))