diff mbox

[U-Boot,6/6] net: altera_tse: use BIT macro

Message ID 1446628349-26749-6-git-send-email-thomas@wytron.com.tw
State Superseded
Headers show

Commit Message

Thomas Chou Nov. 4, 2015, 9:12 a.m. UTC 
Replace numerical bit shift with BIT macro
in altera_tse

:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
---
 drivers/net/altera_tse.h | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

Comments

Marek Vasut Nov. 4, 2015, 1:51 p.m. UTC | #1 
On Wednesday, November 04, 2015 at 10:12:29 AM, Thomas Chou wrote:
> Replace numerical bit shift with BIT macro
> in altera_tse
> 
> :%s/(1 << nr)/BIT(nr)/g
> 
> where nr = 0, 1, 2 .... 31
> 
> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>

Whole series:

Reviewed-by: Marek Vasut <marex@denx.de>

Best regards,
Marek Vasut
Chin Liang See Nov. 4, 2015, 4:22 p.m. UTC | #2 
On Wed, 2015-11-04 at 17:12 +0800, thomas@wytron.com.tw wrote:
> Replace numerical bit shift with BIT macro
> in altera_tse
> 
> :%s/(1 << nr)/BIT(nr)/g
> where nr = 0, 1, 2 .... 31
> 
> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
> ---


Reviewed-by: Chin Liang See <clsee@altera.com>

Thanks
Chin Liang
Jagan Teki Nov. 4, 2015, 4:46 p.m. UTC | #3 
On 4 November 2015 at 21:52, Chin Liang See <clsee@altera.com> wrote:
> On Wed, 2015-11-04 at 17:12 +0800, thomas@wytron.com.tw wrote:
>> Replace numerical bit shift with BIT macro
>> in altera_tse
>>
>> :%s/(1 << nr)/BIT(nr)/g
>> where nr = 0, 1, 2 .... 31
>>
>> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
>> ---
>
>
> Reviewed-by: Chin Liang See <clsee@altera.com>

 Reviewed-by: Jagan Teki <jteki@openedev.com>
diff mbox

Patch

diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h
index 14c064b..5593efc 100644
--- a/drivers/net/altera_tse.h
+++ b/drivers/net/altera_tse.h
@@ -14,11 +14,11 @@ 
 #define __packed_1_    __packed __aligned(1)
 
 /* SGDMA Stuff */
-#define ALT_SGDMA_STATUS_BUSY_MSK			0x00000010
+#define ALT_SGDMA_STATUS_BUSY_MSK				BIT(4)
 
-#define ALT_SGDMA_CONTROL_RUN_MSK			0x00000020
-#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK		0x00000040
-#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK		0x00010000
+#define ALT_SGDMA_CONTROL_RUN_MSK				BIT(5)
+#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK			BIT(6)
+#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK			BIT(16)
 
 /*
  * Descriptor control bit masks & offsets
@@ -27,10 +27,10 @@ 
  *	 The following bit-offsets are expressed relative to the LSB of
  *	 the control register bitfield.
  */
-#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK		0x00000001
-#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK	0x00000002
-#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK	0x00000004
-#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK		0x00000080
+#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK		BIT(0)
+#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK	BIT(1)
+#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK	BIT(2)
+#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK		BIT(7)
 
 /*
  * Descriptor status bit masks & offsets
@@ -39,7 +39,7 @@ 
  *	 The following bit-offsets are expressed relative to the LSB of
  *	 the status register bitfield.
  */
-#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK	0x00000080
+#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK	BIT(7)
 
 /*
  * The SGDMA controller buffer descriptor allocates
@@ -85,12 +85,12 @@  struct alt_sgdma_registers {
 };
 
 /* TSE Stuff */
-#define ALTERA_TSE_CMD_TX_ENA_MSK		0x00000001
-#define ALTERA_TSE_CMD_RX_ENA_MSK		0x00000002
-#define ALTERA_TSE_CMD_ETH_SPEED_MSK		0x00000008
-#define ALTERA_TSE_CMD_HD_ENA_MSK		0x00000400
-#define ALTERA_TSE_CMD_SW_RESET_MSK		0x00002000
-#define ALTERA_TSE_CMD_ENA_10_MSK		0x02000000
+#define ALTERA_TSE_CMD_TX_ENA_MSK		BIT(0)
+#define ALTERA_TSE_CMD_RX_ENA_MSK		BIT(1)
+#define ALTERA_TSE_CMD_ETH_SPEED_MSK		BIT(3)
+#define ALTERA_TSE_CMD_HD_ENA_MSK		BIT(10)
+#define ALTERA_TSE_CMD_SW_RESET_MSK		BIT(13)
+#define ALTERA_TSE_CMD_ENA_10_MSK		BIT(25)
 
 #define ALT_TSE_SW_RESET_TIMEOUT		(3 * CONFIG_SYS_HZ)
 #define ALT_TSE_SGDMA_BUSY_TIMEOUT		(3 * CONFIG_SYS_HZ)