Message ID | 55B76ED9.8050108@linaro.org |
---|---|
State | New |
Headers | show |
Kugan <kugan.vivekanandarajah@linaro.org> writes: > * cse.c (cse_insn): Restoring old behaviour for src_eqv > when dest and value in the REG_EQUAL are same and dest > is STRICT_LOW_PART. This fixes the regression and doesn't introduce any new one. Andreas.
On 07/28/2015 06:00 AM, Kugan wrote: > > > On 27/07/15 05:38, Andreas Schwab wrote: >> Kugan <kugan.vivekanandarajah@linaro.org> writes: >> >>> * cse.c (cse_insn): Fix missing check for STRICT_LOW_PART and minor >>> clean up. >> >> This breaks >> >> gcc.target/m68k/tls-ie-xgot.c scan-assembler jsr __m68k_read_tp >> gcc.target/m68k/tls-ie.c scan-assembler jsr __m68k_read_tp >> gcc.target/m68k/tls-le-xtls.c scan-assembler jsr __m68k_read_tp >> gcc.target/m68k/tls-le.c scan-assembler jsr __m68k_read_tp >> >> Andreas. >> > > Sorry for the breakage. My patch to add ZERO_EXTRACT unfortunately > restricts the behaviour in one other case. That is, even when REG_EQUAL > note and src are same, we were setting src_eqv to src when it is > STRICT_LOW_PART. Not sure why but restored the old behaviour. > > I could reproduce this issue by inspecting the generated asm and made > sure that it is fixed. However I could not run regression for m68k > (Sorry I don’t have access to the set-up). > I bootstrapped and regression tested on x86_64-linux-gnu and > arm-none-linux-gnu with no new regressions. > > Thanks, > Kugan > > > gcc/ChangeLog: > > 2015-07-27 Kugan Vivekanandarajah <kuganv@linaro.org> > > * cse.c (cse_insn): Restoring old behaviour for src_eqv > when dest and value in the REG_EQUAL are same and dest > is STRICT_LOW_PART. OK. I verified there were no regressions on m68k.exp with a cross compiler and that the tests referenced by Andreas indeed passes with the patch installed. Thanks, jeff
diff --git a/gcc/cse.c b/gcc/cse.c index 96adf18..17c0954 100644 --- a/gcc/cse.c +++ b/gcc/cse.c @@ -4529,12 +4529,13 @@ cse_insn (rtx_insn *insn) this case, and if it isn't set, then there will be no equivalence for the destination. */ if (n_sets == 1 && REG_NOTES (insn) != 0 - && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 - && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))) + && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0) { - if (GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART) - src_eqv = copy_rtx (XEXP (tem, 0)); + if (GET_CODE (SET_DEST (sets[0].rtl)) != ZERO_EXTRACT + && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) + || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) + src_eqv = copy_rtx (XEXP (tem, 0)); /* If DEST is of the form ZERO_EXTACT, as in: (set (zero_extract:SI (reg:SI 119) (const_int 16 [0x10])