| Message ID | 1430224874-18513-7-git-send-email-leon.alrae@imgtec.com |
|---|---|
| State | New |
| Headers | show |
On Tue, Apr 28, 2015 at 01:41:13PM +0100, Leon Alrae wrote: > Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> I think this deserves a bit more explanation. Isn't 59 bits still the true architectural limit? Cheers James > --- > target-mips/translate_init.c | 9 --------- > 1 file changed, 9 deletions(-) > > diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c > index 8e088c9..af6fb7a 100644 > --- a/target-mips/translate_init.c > +++ b/target-mips/translate_init.c > @@ -553,9 +553,6 @@ static const mips_def_t mips_defs[] = > (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) | > (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV), > .SEGBITS = 42, > - /* The architectural limit is 59, but we have hardcoded 36 bit > - in some places... > - .PABITS = 59, */ /* the architectural limit */ > .PABITS = 36, > .insn_flags = CPU_MIPS64R2 | ASE_MIPS3D, > .mmu_type = MMU_TYPE_R4000, > @@ -636,9 +633,6 @@ static const mips_def_t mips_defs[] = > (1 << FCR0_W) | (1 << FCR0_D) | (1 << FCR0_S) | > (0x00 << FCR0_PRID) | (0x0 << FCR0_REV), > .SEGBITS = 42, > - /* The architectural limit is 59, but we have hardcoded 36 bit > - in some places... > - .PABITS = 59, */ /* the architectural limit */ > .PABITS = 36, > .insn_flags = CPU_MIPS64R6, > .mmu_type = MMU_TYPE_R4000, > @@ -702,9 +696,6 @@ static const mips_def_t mips_defs[] = > (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) | > (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV), > .SEGBITS = 42, > - /* The architectural limit is 59, but we have hardcoded 36 bit > - in some places... > - .PABITS = 59, */ /* the architectural limit */ > .PABITS = 36, > .insn_flags = CPU_MIPS64R2 | ASE_DSP | ASE_DSPR2, > .mmu_type = MMU_TYPE_R4000, >
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c index 8e088c9..af6fb7a 100644 --- a/target-mips/translate_init.c +++ b/target-mips/translate_init.c @@ -553,9 +553,6 @@ static const mips_def_t mips_defs[] = (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) | (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV), .SEGBITS = 42, - /* The architectural limit is 59, but we have hardcoded 36 bit - in some places... - .PABITS = 59, */ /* the architectural limit */ .PABITS = 36, .insn_flags = CPU_MIPS64R2 | ASE_MIPS3D, .mmu_type = MMU_TYPE_R4000, @@ -636,9 +633,6 @@ static const mips_def_t mips_defs[] = (1 << FCR0_W) | (1 << FCR0_D) | (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV), .SEGBITS = 42, - /* The architectural limit is 59, but we have hardcoded 36 bit - in some places... - .PABITS = 59, */ /* the architectural limit */ .PABITS = 36, .insn_flags = CPU_MIPS64R6, .mmu_type = MMU_TYPE_R4000, @@ -702,9 +696,6 @@ static const mips_def_t mips_defs[] = (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) | (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV), .SEGBITS = 42, - /* The architectural limit is 59, but we have hardcoded 36 bit - in some places... - .PABITS = 59, */ /* the architectural limit */ .PABITS = 36, .insn_flags = CPU_MIPS64R2 | ASE_DSP | ASE_DSPR2, .mmu_type = MMU_TYPE_R4000,
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> --- target-mips/translate_init.c | 9 --------- 1 file changed, 9 deletions(-)